This innovative proven simple verification approach meets DO-254 and the latest regulatory guidelines.

Benefits

• Minimize cost of future change
• Expertise in design techniques and device operation
• Conduct pin and gate level testing
• Functional testing

The range of device discrepancies discovered varies from the requirements level to the design tool level. The list of device discrepancies discovered are:

Device Discrepancy Found

• Configuration Management Corruption
• Pin - state sensitivity at startup (floating, tri-state, low, high)
• Requirements inconsistency
• Functional Timing/Race Conflicts
• Functional failures
• Simulation/Synthesis errors
• Latent safety hidden failure condition
• Place & Route errors
• PLD speed sensitivity at slower rate than guaranteed by mfg
• Unfavorable tool optimization changes due to HDL synthesis